PIC16 Basic Compiler Library Support


The library support is a new way for the basic statements implementation.
This is indeed an advanced feature, however that is a way that can be used by both the author and the users to extend the compiler language from the external library files.
The information is loaded from the external textual .lib files stored in the OshonSoft application data folder.
OshonSoft .lib files are documented enough with comments covering all the currently available features of the library support.
Library files can be edited by Notepad, or any other plain text editor.
 
 

oshonsoftpic16-adc.lib file:
 
//the concept is that one library group contains the implementation of one new language functionality - one or more related statements or functions
//library items contain different implementations of the same functionality for different groups of microcontrollers
//#lib_item_begin must be followed by #processor
//#statement_begin, #statement_type, #argument sequence must be fulfilled for proper library load
 
//#processor comma-separated list of processors, x can be used as a wild card character
//#processor can be used in multiple lines to quote all devices if needed
//#parameter is used to implement #define parameters needed for the statement implementation
//#parameter const, parameter_name, allowed_range, default_value
//#parameter symbol, parameter_name, type (pin, bit, byte, address of), system_bit or system_register
//'pin' type is used for the bits in the PORT registers
//'address of' type will implement a constant parameter
//#variable is used to declare global system variables
//#variable variable_name, type (byte, word, long, single, string)
//#statement_begin statement_name [argument1_name[, argument2_name[, ...]]]
//#statement_type type (procedure; inline; function, f_type (byte, word, long, single, string))
//#argument argument_name, type (byte, byte system xx, word, word system xx, long, long system xx, single, string), passing_type
//the default type of the system variables can not be changed with #argument
//passing_type (byval, byval allowed_constant_range, byref, byrefout) for statement_type procedure and inline
//passing_type (byval, byval allowed_constant_range) for statement_type function
//allowed_constant_range can contain arithmetic expressions in brackets, like 0-[EEPROM_Num-1]
 
//used to define parameters and statements that are not available or not applicable for the current item devices
//#parameter n/a, parameter_name
//#statement n/a, statement_name
 
//used to define alternative names for the parameter and statement names defined in the library group
//#alias_for <library_defined_element_name>, <new_alternative_name>
//used to define code variations among processors when only one or more register names in the code should be replaced with their alternatives
//#alternate_reg_name <register_name_used_in_code>, <alternate_register_name>
 
//code section can contain both inline assembler and basic language lines of code
//symbol and const parameters can be used directly in the assembler lines of code
//calculate[] or calc[] macro is available
//calculate[] must be used to enter the parameter value in the basic code, will be replaced with the value of the parameter
//calculate[] can be used to perform one arithmetic operation, will be replaced with the value of the result
//calc[] arithmetic operators: +, -, *, /, % (modulus or remainder operator), \ (division returning integer result)
//calc[] macros can be nested
//reg_addr[] macro will be replaced with the register address; if not found, -1 is returned
//#if [], #endif macro is available
//#if comparison operators: ==,<>,<,>,<=,>=
//Clock_Freq in MHz is available as an argument
//Flash_Num and EEPROM_Num (total number of memory locations) are available as arguments
 
//be careful that basic statements like WaitUs also make use of the system registers and can alter those values
//when using inline assembler code, be careful that basic statements expect to be called with BANK zero selected
//#banksel register_name_or_address
//#banksel directive should be used before any register access with assembler code, in order to use the compiler internal memory banking optimizations
 
//special function registers are declared in basic code as byte variables; if needed, this byte variable type can be changed with #redim directive
//#redim register_name new_type (byte, word, long, single)
 
//list of available compiler system byte registers (bank 0): R0L, R0H, R1L, R1H, R2L, R2H, R3L, R3H, R4L, R4H, R5L, R5H
//list of available compiler system word registers (bank 0): R0HL, R1HL, R2HL, R3HL, R4HL, R5HL
//list of available compiler system long registers (bank 0): R1HL0HL, R3HL2HL, R5HL4HL
 
 
#lib_name OshonSoft ADC Module Library
 
 
#lib_group_begin //ADC_Read statement
//for backward compatibility
#alias_for ADC_Sample_uS, ADC_SAMPLEUS
#alias_for ADC_Clk, ADC_CLOCK
#alias_for ADC_Read, Adcin
 
#lib_item_begin
//ADCON0, bank1,
// CHS4 CHS3 CHS2 CHS1 CHS0 GO/DONE ADON
//ADCON1, bank1,
//ADFM ADCS2 ADCS1 ADCS0 ADPREF1 ADPREF0
//ADFM ADCS2 ADCS1 ADCS0 ADNREF ADPREF1 ADPREF0 //v2
//ADRESL, bank1,
//ADRESH, bank1,
#processor 16f1512, 16f1513
#processor 16f1516, 16f1517, 16f1518, 16f1519
#processor 16f1526, 16f1527
#processor 16f1824, 16f1828 //v2
#processor 16f1825, 16f1829 //v2
#processor 16f1826, 16f1827 //v2
#processor 12f1822, 16f1823
#processor 12f1840
#processor 12lf1840t48a
#processor 16f1847 //v2
#processor 16f1933 //v2
#processor 16f1934, 16f1936, 16f1937 //v2
#processor 16f1938, 16f1939 //v2
#processor 16f1946, 16f1947 //v2
#parameter const, ADC_Sample_uS, 0-255, 20
#parameter const, ADC_Clk, 0-7, 3
        #statement_begin ADC_Read adc_channel, adc_result
        #statement_type procedure
        #argument adc_channel, byte system R0L, byval 0-31
        #argument adc_result, word system ADRESL, byrefout
        #code_begin
        //
        #redim ADRESL word
        #banksel ADCON1
        bsf ADCON1,ADFM
        movlw 0x8f
        andwf ADCON1,f
        movlw calculate[ADC_Clk * 16]
        iorwf ADCON1,f
        #banksel 0
        rlf R0L,f
        rlf R0L,f
        movlw 0x7c
        andwf R0L,w
        #banksel ADCON0
        movwf ADCON0
        bsf ADCON0,ADON
        //
        #banksel 0
        WaitUs calculate[ADC_Sample_uS]
        //
        #banksel ADCON0
        bsf ADCON0,GO
        btfsc ADCON0,GO
        bra $-1
        bcf ADCON0,ADON
        #banksel 0
        bcf PIR1,ADIF
        //
        #code_end
        #statement_end
#lib_item_end
 
#lib_item_begin
//ADCON0, bank1,
// CHS4 CHS3 CHS2 CHS1 CHS0 GO/DONE ADON
//ADCON1, bank1,
//ADFM ADCS2 ADCS1 ADCS0 ADPREF1 ADPREF0
//ADCON2, bank1,
// TRIGSEL2 TRIGSEL1 TRIGSEL0
//TRIGSEL3 TRIGSEL2 TRIGSEL1 TRIGSEL0 //v2
//ADRESL, bank1,
//ADRESH, bank1,
#processor 16f1455, 16f1459
#processor 16f1503 //v2
#processor 16f1507 //v2
#processor 16f1508, 16f1509 //v2
#processor 16f1704, 16f1708 //v2
#processor 12f1501 //v2
#processor 12lf1552
#parameter const, ADC_Sample_uS, 0-255, 20
#parameter const, ADC_Clk, 0-7, 3
        #statement_begin ADC_Read adc_channel, adc_result
        #statement_type procedure
        #argument adc_channel, byte system R0L, byval 0-31
        #argument adc_result, word system ADRESL, byrefout
        #code_begin
        //
        #redim ADRESL word
        #banksel ADCON1
        bsf ADCON1,ADFM
        clrf ADCON2
        movlw 0x8f
        andwf ADCON1,f
        movlw calculate[ADC_Clk * 16]
        iorwf ADCON1,f
        #banksel 0
        rlf R0L,f
        rlf R0L,f
        movlw 0x7c
        andwf R0L,w
        #banksel ADCON0
        movwf ADCON0
        bsf ADCON0,ADON
        //
        #banksel 0
        WaitUs calculate[ADC_Sample_uS]
        //
        #banksel ADCON0
        bsf ADCON0,GO
        btfsc ADCON0,GO
        bra $-1
        bcf ADCON0,ADON
        #banksel 0
        bcf PIR1,ADIF
        //
        #code_end
        #statement_end
#lib_item_end
 
#lib_item_begin
//ADCON0, bank1,
//ADRMD CHS4 CHS3 CHS2 CHS1 CHS0 GO/DONE ADON
//ADCON1, bank1,
//ADFM ADCS2 ADCS1 ADCS0 ADNREF ADPREF1 ADPREF0
//ADCON2, bank1,
//TRIGSEL3 TRIGSEL2 TRIGSEL1 TRIGSEL0 CHSN3 CHSN2 CHSN1 CHSN0
//ADRESL, bank1,
//ADRESH, bank1,
#processor 16f1782, 16f1783
#processor 16f1784, 16f1786, 16f1787
#processor 16f1788, 16f1789
#parameter const, ADC_Sample_uS, 0-255, 20
#parameter const, ADC_Clk, 0-7, 3
        #statement_begin ADC_Read adc_channel, adc_result
        #statement_type procedure
        #argument adc_channel, byte system R0L, byval 0-31
        #argument adc_result, word system ADRESL, byrefout
        #code_begin
        //
        #redim ADRESL word
        #banksel ADCON1
        bsf ADCON1,ADFM
        movlw 0x0f
        movwf ADCON2
        movlw 0x8f
        andwf ADCON1,f
        movlw calculate[ADC_Clk * 16]
        iorwf ADCON1,f
        #banksel 0
        rlf R0L,f
        rlf R0L,f
        movlw 0x7c
        andwf R0L,w
        #banksel ADCON0
        movwf ADCON0
        bsf ADCON0,ADON
        //
        #banksel 0
        WaitUs calculate[ADC_Sample_uS]
        //
        #banksel ADCON0
        bsf ADCON0,GO
        btfsc ADCON0,GO
        bra $-1
        bcf ADCON0,ADON
        #banksel 0
        bcf PIR1,ADIF
        //
        #code_end
        #statement_end
#lib_item_end
 
#lib_item_begin
#processor 16f1454
#parameter n/a, ADC_Sample_uS
#parameter n/a, ADC_Clk
#statement n/a, ADC_Read
#lib_item_end
#lib_group_end
 
 
#lib_group_begin //All_Digital statement
//for backward compatibility
#alias_for All_Digital, AllDigital
 
#lib_item_begin
#processor 16f1512, 16f1513
#processor 16f1516, 16f1517, 16f1518, 16f1519
#processor 16f1526, 16f1527
#processor 16f1824, 16f1828
#processor 16f1825, 16f1829
#processor 16f1826, 16f1827
#processor 12f1822, 16f1823
#processor 12f1840
#processor 12lf1840t48a
#processor 16f1847
#processor 16f1933
#processor 16f1934, 16f1936, 16f1937
#processor 16f1938, 16f1939
#processor 16f1946, 16f1947
#processor 16f1455, 16f1459
#processor 16f1503
#processor 16f1507
#processor 16f1508, 16f1509
#processor 16f1704, 16f1708
#processor 12f1501
#processor 12lf1552
#processor 16f1782, 16f1783
#processor 16f1784, 16f1786, 16f1787
#processor 16f1788, 16f1789
        #statement_begin All_Digital
        #statement_type inline
        #code_begin
        //
        #if [reg_addr[ANSELA] >= 0] ANSELA = 0x00
        #if [reg_addr[ANSELB] >= 0] ANSELB = 0x00
        #if [reg_addr[ANSELC] >= 0] ANSELC = 0x00
        #if [reg_addr[ANSELD] >= 0] ANSELD = 0x00
        #if [reg_addr[ANSELE] >= 0] ANSELE = 0x00
        #if [reg_addr[ANSELF] >= 0] ANSELF = 0x00
        #if [reg_addr[ANSELG] >= 0] ANSELG = 0x00
        //
        #code_end
        #statement_end
#lib_item_end
 
#lib_item_begin
#processor 16f1454
#statement n/a, All_Digital
#lib_item_end
#lib_group_end